CENG
244/L Intro to Digital Systems
Dr.
Thomas Montoya's Spring 2014 Section 1, 3-1 (4 credit hours) Lectures: EP254- MWF 3-3:50 pm; Laboratories: EP336/342- Tu 12-1:50 pm & 2-3:50 pm |
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Examples |
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Chapter
1 Digital Systems and Binary Numbers Table listing number
equivalents - binary_octal_decimal_hexadecimal_table.pdf Table listing 4-bit
signed binary numbers- signed_binary_numbers_table.pdf Table listing binary
codes of decimal numbers- binary_codes_table.pdf Table listing Gray code
- gray_code_table.pdf Table listing ASCII
codes - ASCII_code_table.pdf Figure showing registers
- register_transfer_example.pdf
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Chapter
2 Boolean Algebra and Logic Gates Basic
Boolean algebra theorems & postulates -
Boolean_basic_theorems_postulates.pdf Example
involving a Boolean function - Boolean_function_F1.pdf Boolean
functions w/ two variables - Boolean_functions_2_variables.pdf Two
input logic gate circuit symbols - logic_gates_two_input.pdf
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Chapter
3 Gate-Level Minimization 3 variable Boolean
function K-Map example - K_map_3_variable_Boolean_function.pdf 4 variable Boolean function
K-Map example -
K_map_4_variable_Boolean_function.pdf Karnaugh
Maps -
Karnaugh_maps.pdf K-Map
product-of-sums example - K_map_4_variable_product_of_sums.pdf K-Map
example with don’t care conditions - K_map_4_variable_dont_care.pdf |
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Chapter
4 Combinational Logic 4-bit adder with carry lookahead generation -
carry_lookahead_4bit.pdf 4-bit × 3-bit
multiplier - 4bit_by_3bit_multiplier.pdf 4-bit magnitude
comparator - 4bit_magnitude_comparator.pdf 4-to-8-line decoder
- 3_to_8_line_decoder.pdf 2-to-4-line decoder with
enable input - 2_to_4_line_decoder_enable.pdf 4-to-1-line multiplexer
- 4_to_1_line_multiplexer.pdf Quad 2-to-1-line
multiplexer - quad_2_to_1_line_multiplexer.pdf 8-to-1-line multiplexer
with enable input - 8_to_1_line_74LS151_MUX.pdf Multiplexers using
3-state buffers - multiplexers_3state_gates.pdf |
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Chapter
5 Synchronous Sequential Logic D flip-flops w/
positive-edge triggering - D_flip_flop_positive_edge.pdf Example of a sequential
circuit - sequential_circuit_example.pdf |
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Chapter
6 Registers and Counter 4-bit register w/
parallel load - 4_bit_register_par_load.pdf 4-bit serial transfer w/
shift registers - 4_bit_serial_transfer.pdf Serial adder using shift
registers, full adder, etc - serial_adder.pdf 4-bit universal shift
register - 4_bit_universal_shift_register.pdf Binary ripple counters
- binary_ripple_counters.pdf BCD ripple counters
- BCD_ripple_counters.pdf 4-bit synchronous binary
counter - 4_bit_synch_counter.pdf 4-bit synchronous
up-down binary counter - 4_bit_up_down_synch_counter.pdf 4-bit synchronous binary
counter w/ parallel load- 4_bit_synch_counter_w_load.pdf 4-bit synchronous 012456
counter - 012456_counter.pdf |
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Chapter
7 Memory and Programmable Logic placeholder - placeholder |
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Chapter
8 Design at the Register Transfer Level placeholder - placeholder |